DESIGN AND IMPLEMENTATION OF EFFICIENT ADVANCED ENCRYPTION STANDARD COMPOSITE S-BOX WITH CM-MODE

Abstract

The Advanced Encryption Standard (AES) is one of the famous algorithms for the cryptographic security algorithm and it is specifically used for the data protection and the transmission. The AES novel Mix-Column operation implementation is proposed in this research paper. The Mix-Column is model is improved for the AES decryption through the Very Large Scale Integration (VLSI) System design in this research paper. In AES Mix-Column, large number of logic gates used to perform the multiplication of input stage bytes (output of shift row) and fixed defined state bytes. In order to decrease this problem, the redundant function of Mix-Column is eliminated and re-designed in this paper. Proposed model of Mix-Column minimizes 25% of logic gates compared with previous work. Further, the proposed Mix-Column of AES decryption achieves by improving the performance of area, delay and power consumption. The transformations optimized and the speed is increased.